A Memory Benchmarking Characterisation of ARM-Based Systems-on-Chip for Data Stream Computing

Jul 2, 2014, 3:10 PM
20m
Conference Hall (LIT JINR)

Conference Hall

LIT JINR

Russia, 141980 Moscow region, Dubna, JINR
sectional reports Section 3 - Technology for storaging, searching and processing of Big Data Technology for storaging, searching and processing of Big Data

Speaker

Mr Thomas Wrigley (University of the Witwatersrand, Johannesburg)

Description

The computing requirements of Big Science are ever-increasing and the volume of data produced by some of its projects has long exceeded available off-line storage capacity, necessitating the use of innovative means of data capturing. The volume of data expected to be produced by projects such as the Square Kilometre Array and the to-be upgraded Large Hadron Collider will far exceed existing system capacities. In addition, system and energy costs are sources of increasing concern. A potential solution involves the use of low-cost, low-power ARM-based Systems-on-Chip in large arrays in a manner which provides massive parallelisation for the purposes of high data throughput or Data Stream Computing. This focus on throughput rates increases the importance of memory performance to overall system performance. Using three memory performance benchmarks (namely STREAM, LMBench and pmbw) the performance of three ARM-based Systems-on-Chip, namely the Cortex-A7, -A9 and -A15, is characterised. The implications of these results in the context of Data Stream Computing are then discussed.

Primary author

Mr Thomas Wrigley (University of the Witwatersrand, Johannesburg)

Co-author

Mr Robert Reed (University of the Witwatersrand)

Presentation materials