The XX International Scientific Conference of Young Scientists and Specialists (AYSS-2016)

Development of the CBM RICH readout and DAQ

17 Mar 2016, 13:00

10m

Large Conference Hall, 2nd floor (Bogoliubov Laboratory of Theoretical Physics)

Oral Information Technology AYSS 2016 competition

Speaker

Mr Egor Ovcharenko (JINR, ITEP)

Description

We would like to present the results of the comparison of two different types of readout and data acquisition systems (DAQ) through the example of CBM RICH DAQ. Two triggerless DAQ systems are characterized – one based on nXYTER chip and SysCore readout controller and second based on PADIWA front-end board and multi-functional TRB board. Measurement of time characteristics in laboratory and beam situations of the second readout chain is performed, in particular precision of leading edge timestamp detection by separate components and whole chain. The method of software timestamp correction aimed at the performance is developed. The method for measuring luminescence time profile is developed and applied to the wavelength shifter decay time determination. In order to perform the listed tasks a test setup has been built in the laboratory, measurements have been done, corresponding unpacking and analysis software modules have been developed and obtained results have been analyzed. The source of the signal in CBM RICH is the modern Hamamatsu H12700 multi-anode photomultiplying tube (MAPMT). This PMT has outstanding characteristics – high and uniformly distributed over cathode quantum efficiency, low noise and cross-talk, small gaps between the sensitive areas. nXYTER chip allows to register the amplitude of the input signal together with the timestamp of the leading edge of the input signal. This chip splits the input signal into two. First channel is processed asynchronously by a relatively fast shaper and is needed to detect the timestamp of the input pulse. Second channel is processed by the synchronous electronics detecting pulse amplitude using relatevily slow shaper. PADIWA and TRB are boards which realize most of the functionality using FPGA: PADIWA is a preamplifier and discriminator and TRB is usually programmed such that 4 of 5 available FPGAs work as time-to-digit converters (TDC) and 5th as data concentrator.